Innovative Design accepted in Chip Olympics 2008

Two ECE PhD candidates, Yat-Hei LAM and Tsz Yin MAN, have been invited to present their innovative IC design techniques at the International Solid-State Circuits Conference (ISSCC) 2008, also known as the “Chip Olympics”.

Yat-Hei will present his paper (co-authored with his supervisor Prof. Wing-Hung KI) entitled “A 0.9V 0.35um Adaptively-Biased CMOS LDO With Fast Transient Response”. His proposed voltage regulator could work with very low supply voltage and could handle large and fast load transients. Without using an on-chip compensation capacitor, the active silicon area of the controller is reduced by 50%, leading to a very inexpensive solution for system-on-a-chip (SoC) voltage regulation.

Tsz Yin’s paper is “An Auto-Selectable-Frequency Pulse-Width Modulator for Buck Converters with Improved Light-Load Efficiency” (co-authored with his supervisors Profs. Philip K.T. MOK and Mansun CHAN). The developed converter can simultaneously provide a high-efficient power regulation at low-power condition and eliminate unpredictable high-frequency interference such that standby time of the handheld electronic devices can be significantly enhanced and different communication circuits such as Bluetooth and WiFi ICs can be used without interference. Tsz Yin also presented in ISSCC 2006.

ISSCC is the foremost forum for presentation of advances in solid-state circuits and systems-on-a-chip. The conference offers a unique opportunity for engineers working at the cutting edge of IC design and use to maintain technical currency, and to network with leading experts.